Tutorial Micro 2020 Dnn Dataflows

Media Summary: Presenter: Tushar Krishna (Georgia Tech) This talk is recorded for S .-C. Kao, G Jeong, T Krishna, “ConfuciuX: Autonomous Hardware Resource Assignment for Deep neural networks (DNNs) can be efficiently executed on

Tutorial Micro 2020 Dnn Dataflows - Detailed Analysis & Overview

Presenter: Tushar Krishna (Georgia Tech) This talk is recorded for S .-C. Kao, G Jeong, T Krishna, “ConfuciuX: Autonomous Hardware Resource Assignment for Deep neural networks (DNNs) can be efficiently executed on S.-C. Kao, T Krishna, “GAMMA: Automating the HW Mapping of A huge amount has been published about deep neural network accelerator designs, but what parts of the design actually matter? ... and running MAESTRO Presenter: Geonhwa Jeong (Georgia Tech) This talk is recorded for

Presenter: Sheng-Chun (Felix) Kao (Georgia Tech) This talk is recorded for

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[Tutorial - MICRO 2020] DNN Dataflows

[Tutorial - MICRO 2020] Welcome and Introduction

Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach

[MICRO2020] ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using RL

dMazeRunner: Optimization Infrastructure for Programmable Dataflow Accelerators for Deep Learning

Dataflow-Architecture Co-Design for 2.5D DNN Accelerators using Wireless Network-on-Package

[ICCAD2020] GAMMA: Automating the HW Mapping of DNN Models on Accelerators via Genetic Algorithm

Procrustes: A Dataflow and Accelerator for Sparse Deep Neural Network Training

Does dataflow matter for DNN accelerator performance?

Sparse Tensor Accelerator Modeling Tutorial @ ISCA 2021 [Part 1] (7/7)

Towards Ultra-efficient DNN Inference Acceleration on Edge Devices for Wellbeing Applications

[Tutorial - MICRO 2020] Compiling and Running MAESTRO

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[Tutorial - MICRO 2020] DNN Dataflows

[Tutorial - MICRO 2020] DNN Dataflows

Introduction to

[Tutorial - MICRO 2020] Welcome and Introduction

[Tutorial - MICRO 2020] Welcome and Introduction

Presenter: Tushar Krishna (Georgia Tech) This talk is recorded for

Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach

Understanding Reuse, Performance, and Hardware Cost of DNN Dataflows: A Data-Centric Approach

MICRO

[MICRO2020] ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using RL

[MICRO2020] ConfuciuX: Autonomous Hardware Resource Assignment for DNN Accelerators using RL

S .-C. Kao, G Jeong, T Krishna, “ConfuciuX: Autonomous Hardware Resource Assignment for

dMazeRunner: Optimization Infrastructure for Programmable Dataflow Accelerators for Deep Learning

dMazeRunner: Optimization Infrastructure for Programmable Dataflow Accelerators for Deep Learning

Deep neural networks (DNNs) can be efficiently executed on

Dataflow-Architecture Co-Design for 2.5D DNN Accelerators using Wireless Network-on-Package

Dataflow-Architecture Co-Design for 2.5D DNN Accelerators using Wireless Network-on-Package

Robert Guirado presents the paper "

[ICCAD2020] GAMMA: Automating the HW Mapping of DNN Models on Accelerators via Genetic Algorithm

[ICCAD2020] GAMMA: Automating the HW Mapping of DNN Models on Accelerators via Genetic Algorithm

S.-C. Kao, T Krishna, “GAMMA: Automating the HW Mapping of

Procrustes: A Dataflow and Accelerator for Sparse Deep Neural Network Training

Procrustes: A Dataflow and Accelerator for Sparse Deep Neural Network Training

MICRO 2020

Does dataflow matter for DNN accelerator performance?

Does dataflow matter for DNN accelerator performance?

A huge amount has been published about deep neural network accelerator designs, but what parts of the design actually matter?

Sparse Tensor Accelerator Modeling Tutorial @ ISCA 2021 [Part 1] (7/7)

Sparse Tensor Accelerator Modeling Tutorial @ ISCA 2021 [Part 1] (7/7)

Tutorial

Towards Ultra-efficient DNN Inference Acceleration on Edge Devices for Wellbeing Applications

Towards Ultra-efficient DNN Inference Acceleration on Edge Devices for Wellbeing Applications

Intro ...

[Tutorial - MICRO 2020] Compiling and Running MAESTRO

[Tutorial - MICRO 2020] Compiling and Running MAESTRO

... and running MAESTRO Presenter: Geonhwa Jeong (Georgia Tech) This talk is recorded for

[Tutorial - MICRO 2020] ConfuciuX: Hardware Design-space Exploration via RL and Optimization

[Tutorial - MICRO 2020] ConfuciuX: Hardware Design-space Exploration via RL and Optimization

Presenter: Sheng-Chun (Felix) Kao (Georgia Tech) This talk is recorded for