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FPGA Dev Live Stream: Reverse-engineering an Undocumented FPGA Board

FPGA Dev Live Stream: Reverse-engineering an Undocumented FPGA Board

FPGA

FPGA Dev Live Stream: FPGA board bring-up and testing of high-speed serializers

FPGA Dev Live Stream: FPGA board bring-up and testing of high-speed serializers

FPGA

FPGA Dev Live Stream: FPGA firmware updates over PCIe

FPGA Dev Live Stream: FPGA firmware updates over PCIe

FPGA

FPGA Dev Live Stream: 10G PHY, 64b/66b, and DFE: Building a Transceiver Watchdog

FPGA Dev Live Stream: 10G PHY, 64b/66b, and DFE: Building a Transceiver Watchdog

FPGA

FPGA Dev Live Stream: PCIe DMA on Stratix 10 MX [Part 1]

FPGA Dev Live Stream: PCIe DMA on Stratix 10 MX [Part 1]

FPGA

GateMate: A European 28nm FPGA with an Open-Source Toolchain and Radiation Qualification Results

GateMate: A European 28nm FPGA with an Open-Source Toolchain and Radiation Qualification Results

FDF Seminar https://indico.cern.ch/event/1587509/ Speaker: Patrick Urban (Cologne Chip AG)

FPGA Dev Live Stream: AXI DMA Interface

FPGA Dev Live Stream: AXI DMA Interface

FPGA

FPGA Developer Robert Peip aka FPGAzumSpass

FPGA Developer Robert Peip aka FPGAzumSpass

I recently had the pleasure of speaking with MiSTer /

FPGA Engineer at a global technology-based trading firm

FPGA Engineer at a global technology-based trading firm

Find out what being an

Ultra96 Live Demos // FPGA Single-Board Computer

Ultra96 Live Demos // FPGA Single-Board Computer

Part 2 of 3 –

FPGA Dev Live Stream: [Re]building Corundum, part 1

FPGA Dev Live Stream: [Re]building Corundum, part 1

FPGA

FPGA Dev Live Stream: [Re]building Corundum, part 4

FPGA Dev Live Stream: [Re]building Corundum, part 4

FPGA

FPGA Dev Live Stream: More Corundum Porting

FPGA Dev Live Stream: More Corundum Porting

FPGA