Media Summary: Presented by Cheng Wang, Sr. VP, Software Architecture Engineering, Presented by Cheng Wang, Sr. VP, Software, Architecture, Engineering, Jeremy Roberson, Technical Director and Software Architect for AI and Machine Learning at

Flex Logix High Performance Inference - Detailed Analysis & Overview

Presented by Cheng Wang, Sr. VP, Software Architecture Engineering, Presented by Cheng Wang, Sr. VP, Software, Architecture, Engineering, Jeremy Roberson, Technical Director and Software Architect for AI and Machine Learning at Presented by Jeremy Roberson, Technical Director and AI Cheng Wang, senior vice president of engineering at Inferencing at the edge, what are some of the main considerations in designing and choosing an inferencing chip, why ...

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Flex Logix: High Performance Inference for Power Constrained Applications
Flex Logix: Performance Estimation and Benchmarks for Real-World Edge Inference Applications
Flex Logix: An AI Inference Accelerator with High Throughput/mm^2 for Megapixel Models
Flex Logix Demonstration of Enabling High Performance AI Inference At the Edge
Flex Logix Demonstration of Its InferX IP for AI Inference Implementing Object Detection at the Edge
FlexLogix : NMAX Neural Inference Processor - very high performance at very low DRAM bandwidth
Flex Logix: eFPGA Innovation for Increased DSP Acceleration
Flex Logix: Why Software is Critical for AI Inference Accelerators
Software In Inference Accelerators
Flex Logix Introduction to Its Latest-generation InferX IP for AI Inference at the Edge
Inferencing Efficiency
Inferencing In Hardware
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Flex Logix: High Performance Inference for Power Constrained Applications

Flex Logix: High Performance Inference for Power Constrained Applications

Presented by Cheng Wang, Sr. VP, Software Architecture Engineering,

Flex Logix: Performance Estimation and Benchmarks for Real-World Edge Inference Applications

Flex Logix: Performance Estimation and Benchmarks for Real-World Edge Inference Applications

Presented by Vinay Mehta, AI

Flex Logix: An AI Inference Accelerator with High Throughput/mm^2 for Megapixel Models

Flex Logix: An AI Inference Accelerator with High Throughput/mm^2 for Megapixel Models

Presented by Cheng Wang, Sr. VP, Software, Architecture, Engineering,

Flex Logix Demonstration of Enabling High Performance AI Inference At the Edge

Flex Logix Demonstration of Enabling High Performance AI Inference At the Edge

Jeremy Roberson, Technical Director and Software Architect for AI and Machine Learning at

Flex Logix Demonstration of Its InferX IP for AI Inference Implementing Object Detection at the Edge

Flex Logix Demonstration of Its InferX IP for AI Inference Implementing Object Detection at the Edge

Jeremy Roberson, Technical Director and Software Architect for AI and Machine Learning at

FlexLogix : NMAX Neural Inference Processor - very high performance at very low DRAM bandwidth

FlexLogix : NMAX Neural Inference Processor - very high performance at very low DRAM bandwidth

NMAX Neural

Flex Logix: eFPGA Innovation for Increased DSP Acceleration

Flex Logix: eFPGA Innovation for Increased DSP Acceleration

Presented by Cheng Wang, Sr. VP, Software, Architecture, Engineering,

Flex Logix: Why Software is Critical for AI Inference Accelerators

Flex Logix: Why Software is Critical for AI Inference Accelerators

Presented by Jeremy Roberson, Technical Director and AI

Software In Inference Accelerators

Software In Inference Accelerators

Geoff Tate, CEO of

Flex Logix Introduction to Its Latest-generation InferX IP for AI Inference at the Edge

Flex Logix Introduction to Its Latest-generation InferX IP for AI Inference at the Edge

Jeremy Roberson, Technical Director and Software Architect for AI and Machine Learning at

Inferencing Efficiency

Inferencing Efficiency

Geoff Tate, CEO of

Inferencing In Hardware

Inferencing In Hardware

Cheng Wang, senior vice president of engineering at

Faster Inferencing At The Edge

Faster Inferencing At The Edge

Inferencing at the edge, what are some of the main considerations in designing and choosing an inferencing chip, why ...